This research group focuses on a range of networking architectures from mobile systems to ad-hoc sensor networks. Techniques involve the design of advanced digital systems for application-specific embedded systems and advanced algorithms for improving network efficiency. The Group uses state-of-the-art dynamic field programmable gate array hardware to examine physical implementations of these principles.
Below are a range of research topics under which we are currently recruiting PhD students. If you are interested in studying in any of these areas then please email the associated contact for further discussion.
Wireless Sensor Networks
We are interested in massive dynamic sensor networks where the sensors are deployed and never recovered. In addition to the problems of an ad-hoc dynamic network (see above) we also have a requirement to minimise the energy use in these networks in order to extend the operating time of the sensors. We have previously developed simple energy use models for protocols involving putting the sensors to sleep. As low energy Tx/Rx modules become available, the energy used by the node processor will increase as a proportion of the total. It will then be important to optimise processing as well as Tx/RX energy. Contact: Dr. John Williams
Ad-hoc networks are dynamic in that nodes on the network can join and leave at any time as well as being able to move while connected. Thus the network topology and hence the routing tables are dynamic. This can happen on slow time scales (i.e. the topology changes more slow than the time it takes to update the routes) where traditional approaches will work. If the topology changes on a time scale that is comparable or faster than the routing update time then new approaches are needed. Contact: Prof. Keith Blow
Applications of FPGAs
FPGAs have evolved from high cost prototyping hardware solutions into low cost mainstream products. The main reason is the ability to reconfigure these devices after the hardware has been built and thus facilitate rapid product development and capability upgrades. The research focuses on the use of FPGAs to implement entire microcontroller architectures on these devices in VHDL. Contact: Dr. Marc Eberhard
Architectures for handling high-speed serial data.
High speed serial data interconnects are becoming more and more important for future high performance computing cluster technologies. Both latency and throughput are essential and the research work focuses on using FPGAs to implement high performance switch fabrics and backbones. Contact: Dr. Marc Eberhard
Massively parallel simulations of fibre optic communication systems including HPC scalability studies.
In fibre optic communication systems the study of rare events is of great importance to derive reliable estimates of outage and error probabilities. The research focuses on using supercomputers with thousands of cores to run these massively parallel simulations and to develop the simulation software used. Contact: Dr. Marc Eberhard
The group has access to EPSRC funded studentships. We are particularly interested in candidates interested in ad-hoc networking and mobile systems. Full funding is available to EU citizens, non-EU citizens may apply but they must provide full funding for fees and maintenance. Formal applications should be submitted to the research office of the School of Engineering and Applied Science.